1. Field of the Invention
The present invention relates to a method of fabricating a chip, and more particularly to a method of fabricating a light emitting diode (LED) chip.
2. Description of Related Art
FIGS. 1A through 1F schematically illustrate cross-sectional views of a fabricating process of a conventional light emitting diode chip. Firstly, a first type semiconductor material layer 122, a light emitting material layer 124, and a second type semiconductor material layer 126 are sequentially formed on a substrate 110 to form a semiconductor stacked layer 128. Here, a method of forming the semiconductor stacked layer 128 is, for example, a metal organic chemical vapor deposition (MOCVD) process, or other suitable epitaxial processes to form the semiconductor stacked layer 128 as shown in FIG. 1A.
Next, the semiconductor stacked layer 128 is patterned to form a semiconductor device layer 120. The semiconductor device layer 120 as shown in FIG. 1B is formed by a conventional photolithography and etching process (PEP).
Thereafter, a current blocking layer 130 is formed on an upper surface 120a of the semiconductor device layer 120. Here, the current blocking layer 130 as shown in FIG. 1C is formed by the conventional PEP. Specifically, the method of forming the current blocking layer 130 is forming a dielectric material layer (not shown) entirely on the substrate 110. Then, the dielectric material layer is patterned by the PEP to form the current blocking layer 130 as shown by FIG. 1C.
Afterwards, a current spreading layer 140 is formed on an upper surface 120a of the semiconductor device layer 120 to cover the current blocking layer 130. The current spreading layer 140 is formed by the conventional PEP. In other words, the method of forming the current spreading layer 140 is forming a conductive layer (not shown) entirely on the substrate 110 to cover the semiconductor device layer 120 and the current blocking layer 130. Next, the conductive layer is patterned by the PEP to form the current spreading layer 140 as shown by FIG. 1D.
Upon completion of the foregoing steps, a plurality of electrodes 150 is formed on the current spreading layer 140 and the semiconductor device layer 120. The electrodes 150 are formed by the conventional PEP. Specifically, the method of forming the electrodes 150 is forming an electrode material layer (not shown) entirely on the current spreading layer 140 and the semiconductor device layer 120. Next, the electrode material layer is patterned by the PEP to form the electrodes 150 on the current spreading layer 140 and the semiconductor device layer 120, as shown by FIG. 1E.
Then, a passivation layer 160 is formed on the current spreading layer 140 and the semiconductor device layer 120 not covered by the electrodes 150. The passivation layer 160 is formed by the conventional PEP, for example. Specifically, the method of forming the passivation layer 160 is forming a dielectric material layer (not shown) entirely on the substrate 110 to cover the current spreading layer 140, the electrodes 150, and the semiconductor device layer 120. Next, the electrode material layer is patterned by the PEP to form the passivation layer 160 on the current spreading layer 140 and the semiconductor device layer 120 not covered by the electrodes 150, as shown in FIG. 1F. So far, the fabricating steps of the conventional light emitting diode chip 100 are generally completed.
In view of the foregoing, the fabrication of the conventional light emitting diode chip 100 requires at least five PEPs. In other words, the light emitting diode chip 100 requires at least five masks of different patterns to perform the PEPs aforementioned. Since each of the masks is rather costly, the fabrication cost and the fabrication time of the light emitting diode chip 100 can not be reduced.